1. Field of the Invention
The present invention relates to a semiconductor device with a T-gate electrode capable of improving a noise characteristic by reducing gate resistance and a method of fabricating the same.
The present invention was supported by the IT R&D program of MIC/IITA [2005-S-039-03, SoP for 60 GHz Pico cell Communication].
2. Description of the Related Art
In a pseudomorphic high electron mobility transistor (PHEMT) that is a compound semiconductor device, one or more layers have lattice constants that are considerably different from those of other materials in the compound semiconductor device, and an operation speed is improved by increasing mobility of electrons in a channel layer due to distortion of stress caused by this mismatch of lattice.
In the PHEMT, it is difficult to grow a substrate. However, since the PHEMT has increased current density that is transmitted to a channel layer and high electron mobility, the PHEMT has high power and improved noise characteristic. Accordingly, the PHEMT can operate in a high frequency. As a result, the PHEMT is widely applied to microwave or millimeter-wave band devices. Specifically, since the PHEMT has advantages such as a low super-high frequency noise characteristic, the PHEMT is an important device used to develop millimeter-wave band circuits and components with high performance for wireless communication or circuits and components for tens of Gbps optical communication. In order to improve a noise characteristic by reducing high modulation operation and high gate resistance, a T-gate or mushroom-gate which has a wide cross section is essentially used for the high speed semiconductor device.
The T-gate or mushroom-gate is generally formed through an electron beam lithography method or a photolithography method. Since low resolution insufficient to form a fine line width of a gate electrode is obtained through the photolithography method, the electron beam lithography method is widely used. In the electron beam lithography method, a double-layered or triple-layered photosensitive layer is used.
FIG. 1 is a cross-sectional view illustrating an example of a T-gate structure fabricated by using an insulation film and a mixed photosensitive film according to a conventional technique.
Referring to FIG. 1, a conventional T-gate structure is obtained by forming an etching stop layer 105 on a gallium arsenide (GaAs) substrate 103, forming a GaAs cap 107 by coating the etching stop layer 105 with GaAs and wet-etching the GaAs coat, forming drain and source electrodes 109a and 109b constructed with a Ti—Pt—Au metal layer on the GaAs cap 107, forming a T-gate electrode 113 on the exposed etching stop layer 105 on which the GaAs cap 107 is not formed, and forming an insulation layer 111 constructed with a silicon nitride film on the drain and source electrodes 109a and 109b. 
In this T-gate structure, a length of a base of the T-gate 113 may be increased due to the wet-etching of the GaAs cap layer 107, and a high frequency characteristic may be deteriorated due to an increase of gate-source and gate-drain capacitance.
In addition, since a wet-etching process is performed by using the etching stop layer 105, it is necessary to accurately adjust an etching rate. Since an undercut may be formed due to an etching characteristic in which the wet-etching process is performed in lateral directions not only in depth, source resistance may increase and a gate length may be changed. Accordingly, there occurs a problem in performance of a device.